This invention relates to a phase shifter and a multi-bit phase shifter electrically changing pass phase of a signal in microwave and extremely high frequency band.
A conventional phase shifter is shown in FIG. 11, for example one described in Joseph F. White xe2x80x9cMicrowave Semiconductor Application Engineeringxe2x80x9d (CQ Publishing, pp. 336-339).
In FIG. 11, input/output terminals 1a, 1b, single-pole double-throw (SPDT) switches 9a, 9b, and transmission lines 10a, 10b are shown.
The phase shifter shown in FIG. 11 operates as follows.
Radio frequency (RF) signal input from an input/output terminal 1a is switched by a SPDT switch 9a. 
A case where the RF signal passes through a transmission line 10a is described below. The RF signal switched by the SPDT switch 9a is input to a SPDT switch 9b through the transmission line 10a. The SPDT switch 9b operates cooperatively with the SPDT switch 9a, and the RF signal is output from an input/output terminal 1b. 
Next, a case where the RF signal passes through a transmission line 10b is described below. The RF signal switched by the SPDT switch 9a is input to a SPDT switch 9b through the transmission line 10b. The SPDT switch 9b operates cooperatively with the SPDT switch 9a, and the RF signal is output from the input/output terminal 1b. 
In the phase shifter, the length of the transmission line 10a is different from the length of the transmission line 10b, and the pass phase can be switched depending on whether the RF signal passes through the transmission line 10a or 10b. 
The conventional phase shifter has a problem of increased circuit size because the transmission lines with different lengths are used depending on the magnitude of phase shift.
Therefore, it is an object of the invention to overcome the above problem and provide a miniaturized phase shifter and multi-bit phase shifter in which a filter is constructed from a capacitor at FET pinch-off and pass phase can be changed by turning the FET on and off.
In order to attain the above-mentioned object, a phase shifter according to the present invention comprises: a first FET having a drain electrode connected to an input terminal and a source electrode connected to an output terminal; a second FET, in which one of a drain electrode and a source electrode thereof is connected to the source electrode of the first FET, and the other is connected to ground via a first inductor; and a third FET, in which one of a drain electrode and a source electrode thereof is connected to the drain electrode of the first FET, and the other is connected to ground via a second inductor.
Also, the phase shifter is characterized in that the first inductor is connected between the drain electrode and the source electrode of the second FET, and the second inductor is connected between the drain electrode and the source electrode of the third FET.
Also, the phase shifter is characterized in that a first capacitor is connected between the drain electrode and the source electrode of the first FET.
Also, the phase shifter is characterized in that a first capacitor is connected between the drain electrode and the source electrode of the second FET, and a second capacitor is connected between the drain electrode and the source electrode of the third FET.
Also, the phase shifter is characterized in that the drain electrode of the first FET is connected in common to one of the drain electrode and the source electrode of the second FET, and the source electrode of the first FET is connected in common to one of the drain electrode and the source electrode of the third FET.
Further, a multi-bit phase shifter according to the present invention includes a combination of a plurality of phase shifters each having different magnitudes of phase shift, the phase shifter comprising: a first FET having a drain electrode connected to an input terminal and a source electrode connected to an output terminal; a second FET, in which one of a drain electrode and a source electrode thereof is connected to the source electrode of the first FET, and the other is connected to ground via a first inductor; and a third FET, in which one of a drain electrode and a source electrode thereof is connected to the drain electrode of the first FET, and the other is connected to ground via a second inductor.
Also, the multi-bit phase shifter is characterized in that a third inductor is connected between the drain electrode and the source electrode of the second FET, and a fourth inductor is connected between the drain electrode and the source electrode of the third FET.
Also, the multi-bit phase shifter is characterized by further comprising a 180-degree bit phase shifter constituted by a switching phase shifter in which a low pass filter and a high pass filter are switched by a single-pole double-throw (SPDT) switch, characterized in that a phase shifter having the first through the third FETs and the first through the fourth inductors is used as a 90-degree bit phase shifter.
Also, the multi-bit phase shifter is characterized by further comprising: a 45-degree bit phase shifter having the same configuration as the 90-degree bit phase shifter; a 22.5-degree bit phase shifter wherein a fifth inductor is connected in parallel between a drain and a source of a fourth FET, a sixth inductor with one end thereof being connected to ground is connected to one of a drain and a source of a fifth FET by means of a switch, and the drain and source of the fifth FET are used as an input terminal and an output terminal, respectively; and a 11.25-degree bit phase shifter wherein a seventh inductor is connected in parallel between a drain and a source of a sixth FET, and the drain and source of the sixth FET are used as an input terminal and an output terminal, respectively.
Also, the multi-bit phase shifter is characterized in that a first capacitor is connected between the drain electrode and the source electrode of the first FET.
Also, the multi-bit phase shifter is characterized in that a first capacitor is connected between the drain electrode and the source electrode of the second FET, and a second capacitor is connected between the drain electrode and the source electrode of the third FET.
Also, the multi-bit phase shifter is characterized in that the drain electrode of the first FET is connected in common with one of the drain electrode and the source electrode of the second FET, and the source electrode of the first FET is connected in common with one of the drain electrode and the source electrode of the third FET.